发明名称 |
ARITHMETIC SYSTEM USING MASK REGISTER |
摘要 |
PURPOSE:To facilitate control when conditioned arithmetic is performed by performing masked vector arithmetic operations simultaneously by providing mask registers. CONSTITUTION:A vector register 2 sets many data 1 required for vector arithmetic or arithmetic results. A mask register part 3 sets mask bits to be used for the vector arithmetic. Both the 1st-4th operators 4-7 read data required for arithmeitc from the vector register sections of the vector register 2 to set the arithmetic results in the specified vector register sections of the vector register 2, and are controlled according to the mask bits read out from the mask register of the mask register part 3 at need or set arithmetic results in the mask register part 3. |
申请公布号 |
JPS5723174(A) |
申请公布日期 |
1982.02.06 |
申请号 |
JP19800097734 |
申请日期 |
1980.07.17 |
申请人 |
FUJITSU LTD |
发明人 |
MOGI MASANORI;UCHIDA KEIICHIROU |
分类号 |
G06F17/16;G06F15/78;(IPC1-7):06F15/347 |
主分类号 |
G06F17/16 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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