D=A converter with two counters - supplying operational amplifier and low-pass filter with feedback control of converter reference voltages

摘要

A first binary counter (14) has parallel outputs via inverters (17) to a first d-a converter (16) whose output is fed to the inverting terminal of an operational amplifier (20) via a resistor. The counter has a carry output which clocks a second counter (13) whose parallel outputs are fed directly to a second d-a converter (15) whose output is fed to the non-inserting input of the operational amplifier. The carry signal is also fed to the S input of an RS-Flip-flop. The R input comes from the output of a second operational amplifier (24) whose negative input receives a reference voltage, and whose positive input receives the output of the first operational amplifier and is biassed by a transistor (26) which is biased by the NOTQ output of the flip-flop. The Q output is 01Dedwithaclocksignal(32)todrivetheclockinputofan Up-down counter. The up-down control is fed by the output of the second operational amplifier. The counters outputs are fed to a third d-a converter (30) to the reference input of the first d-a counter. The clock signal is also fed via a switching circuit (33) and a switch (34) to the clock input of the first counter.