| 摘要 |
PURPOSE:To hold a synchronizing relation of a key signal and a video signal, by delaying a control data of a key signal. CONSTITUTION:A video signal fp is inputted to a video processing equipment 11, and is written in a memory device 12 in accordance with a write timing signal Tw which has been generated from its own synchronizing component. The video signal fp which has been stored is read out and outputted in accordance with a read timing signal TR which has been generated corresponding to a reference synchronizing signal fs. On the other hand, a key signal data fKD which is outputted by a key signal controller 13 is stored by the write timing signal in the same way as the video signal, and is read out by the read timing signal TR. This key signal data fKD which has been read out is supplied to a key signal generator 14, an actual key signal fK is generated, and processes a video signal which is outputted by the video processing equipment 11. Accordingly, since the key signal data fKD is also delayed in the same way as the video signal fp, it is possible to hold synchronization of the video signal fp and key signal fk. |
