| 摘要 |
PURPOSE:To execute a logical error inspection of a data to be communicated, by a sending side, by providing a correctness and error informaton data part for informing whether a data which has been sent in the previous time is correct or erroneous, in a sending data. CONSTITUTION:When inspecting the rationality of a data to be communicated in an interprocessor communication, its partial logical error inspection is executed in a sending side, and in a sending data is provided a correctness and error information data part for information whether a data which has been sent previous time is correct or erroneous, through which it is sent. A signal from a data bus 106 is received by a receiving device 113, a received data is stored in a buffer 204, also contents of a register 202 in which a correctness or error decision data of a data which has been received in the previous time has been registered, and a correctness and error information data which has been received this time are detected by a coincidence detecting circuit 201, and a logical circuit 203 sends out a confirmation signal 208 to a receiving processor 110. |
