| 摘要 |
PURPOSE:To avoid received data from not being stored in a buffer memory by writing the reception data sequentially to an idle reception buffer memory and reading the data to a main memory sequentially from the reception buffer memory stored with the reception data. CONSTITUTION:In receiving next data until the DMA transfer is not finished, at the time of an idle reception buffer memory (j) (j=0-N) is vailable, the reception data is written in the idle reception buffer memory (j), and at the time of the writ4e is finished, the DMA transfer is started to the reception DMA channel (j) by the command of a reception control section 23. Thus, the DMA transfer from the reception buffer memory (i) to the main memory and the DMA transfer from the reception buffer memory (j) to the main memory are executed in parallel. Thus, the occupied state of all plural reception buffer memories and the reception buffer busy state resulting that the data received next are not stored in any reception buffer memory from the occupied state are prevented.
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