| 摘要 |
PURPOSE:To prevent execution of a test instruction from being restricted by the operation speed due to an LSI tester, by executing the instruction code written in a RAM at the execution time of the test instruction. CONSTITUTION:An LSI tester is used to write the instruction code, which is used at the test execution time, into an RAM10 from a terminal 8. The write command to the RAM10 is inputted to a test control terminal 9, and then, an input/output control circuit 13 outputs the signal of the terminal 8 to an internal data bus 7. Further, the signal of the bus 7 is written in the RAM10 through a bit correcting circuit 11 and is reset again. Next, when the execution command is inputted from the terminal 9, the correcting circuit 11 functions to correct the output of the RAM 10 so that this output becomes in the same length as the output bit length of an ROM1. A multiplexer 12 functions to select and input the output of the correcting circuit 11. Consequently, a test instruction L written preliminarily in the RAM 10 is latched in an instruction register 3 and is decoded by an instruction decoder 4, thus executing the test instruction code. |
