发明名称 VIDEO BINARY CODING SYSTEM
摘要 PURPOSE:To extract a differentiated binary coded signal of only a large pattern, by producing a gate pulse by giving a 2-order differentiation to a video signal and giving a shaping to the output waveform of the video signal and then securing an AND with the signal supplied from a normal binary coded circuit. CONSTITUTION:A video signal 1 ia differentiated by a 1-order differentiating circuit 2 to be turned into a 2-order differentiated waveform 5 through the subsequent 2-order differentiating circuit 4. The waveform 5 is shaped by a waveform shaping circuit 6 to obtain a gate pulse 12 that shows a region of a required large pattern signal. On the other hand, the signal 1 supplied to a binary coded circuit 3 is binary coded to be applied to an AND circuit 15 via a delaying circuit 17 and in the form of a delay signal 18. An AND is secured between the signal 18 and the pulse 12 through the circuit 15, and thus a differentiated binary coded signal 16 is obtained to be used as a pattern recognizing binary coded signal. In such way, only a comparatively large pattern is extracted to reduce the capacity of a software for recognition of pattern.
申请公布号 JPS572181(A) 申请公布日期 1982.01.07
申请号 JP19800074257 申请日期 1980.06.04
申请人 HITACHI LTD 发明人 ARIGA MAKOTO
分类号 H03M7/00;G06K9/20;H04N7/00;H04N7/12;H04N7/18 主分类号 H03M7/00
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