发明名称 KEY SAMPLING SIGNAL CONTROLLING SYSTEM
摘要 PURPOSE:To reduce power consumption by preventing unnecessary key inputting, by suppying key sampling KS signals corresponding to only keys required according to specified modes. CONSTITUTION:In a small-size electronic computer equipped with a timer function, when a computation mode is specified with a computation mode key AC, a computation mode specifying input is read in a buffer 11 with the timing when a signal KC1 from a KS decoder 7 is outputted and then written in an RAM3 via an arithmetic part 4. The contents of data in the RAM3 are judged by a microprogram from an ROM1 according to the contents of a counter 6 to perform arithmetic processing by keying operation. When a time display mode key TM is operated, a signal INS indicating the time display mode is sent from the ROM1 to an instruction decoder 5, which outputs a sampling selection signal S2 to reset an FF10, so that since key input processing is performed even with ten keys, function keys, etc., no electric power is consumed.
申请公布号 JPS57741(A) 申请公布日期 1982.01.05
申请号 JP19800075147 申请日期 1980.06.04
申请人 CASIO COMPUTER CO LTD 发明人 ORIMOTO TAKASHI
分类号 A23L17/60;G04G21/00;G04G99/00;G06F3/02;G06F3/023;G06F15/02;H03M11/20 主分类号 A23L17/60
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