发明名称 MEMORY CONTROL SYSTEM
摘要 PURPOSE:To execute access the entire actual memory area by minimizing the extent of the modification of software, by extending the capacity of an actual memory and by transferring data between an accessible area and the extended memory area through privileged instructions. CONSTITUTION:When a privileged instruction is generated and its operand is set in a register 1, the instruction code is set in an instruction code register 2 to turn off an address converting mechanism 8 via a decoder 3. Consequently, the low- order 24 bits in the register 1 are set in a register 7 as they are, and an actual memory area which is accessible by a CPU program, a channel, etc., is accessed. On the other hand, the output of the decoder 3 and an operand processing signal are ANDed to control a selector 5, and the high-order eight bits, etc., in the register 1 are supplied to the high-order 8 bits of the register 7 as they are to access the extended area of the actual memory. Thus, the extent of the modification of software is minimized and the actual memory area is entirely accessed without generating an overhead, etc.
申请公布号 JPS56169278(A) 申请公布日期 1981.12.25
申请号 JP19800070135 申请日期 1980.05.28
申请人 HITACHI LTD 发明人 HAYASHI KENJI;MIYADERA HIROO
分类号 G06F12/02;G06F9/32;G06F12/10 主分类号 G06F12/02
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