1-Out-of-N decoder for a semiconductor memory or the like, method of selecting one out of N lines in a matrix and address decoding circuit arrangement

摘要

In the case of an electrically programmable memory matrix, which has rows and columns of floating-gate memory cells, output lines and earth lines are alternately used between the cell columns, which produces an arrangement with a virtual earth. A row is selected by one part of an address input signal, and a column is selected by a further part. An output line on one side of the selected column is activated, and an earth line is activated on the other side. A differential sense amplifier responds to the voltage on the selected output line and to a reference voltage. The number of transistors required in the decoder for the row selecting function is greatly reduced by using predecoders, which carry out a 1-out-of-4 selection for each pair of address bits, one of these selection output signals then being used to activate N multiplexers, and all the others being used as input signals of a decoder having N outputs to the multiplexers. <IMAGE>