发明名称 |
DIGITAL SIGNAL TRANSMITTING SYSTEM |
摘要 |
PURPOSE:To ensure compressing transmission and expanding reception for a digital signal having a reduced error of the predicted value of a predicted signal, by carrying out a bit shift when the predicted signal exceeds the level set previously. CONSTITUTION:An analog signal supplied through an input terminal 1 receives sampling period T through an A/D converter 2 and is quantized to be supplied to a shift register part 4 that functions as a bit selecting circuit in a signal predicting circuit 3. The part 4 has shift action in a prescribed direction by the output of a comparator 10 or 17 when the predicted signal exceeds the range of set reference level which is between the upper and lower limit reference 1 levels set previously. Then transmission is carried out to the receiving system with a bit compression. |
申请公布号 |
JPS56168448(A) |
申请公布日期 |
1981.12.24 |
申请号 |
JP19800071660 |
申请日期 |
1980.05.29 |
申请人 |
VICTOR COMPANY OF JAPAN |
发明人 |
KASUGA MASAO;HIYAMA NORIO;TSUCHIKANE YOSHIYUKI |
分类号 |
H03M7/32;G11B20/10;H04B14/04;H04B14/06 |
主分类号 |
H03M7/32 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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