发明名称 |
STRUCTURE FOR LOGIC CIRCUITS |
摘要 |
<p>A structure for logic circuits comprises a current source formed by a PNP transistor and two complementary transistors integrated on the same N-type substrate. A buried plate and P-type walls forms insulating housings. These two complementary transistors are of the vertical type and the PNP transistor has the buried layer as its collector. This buried layer and the insulating walls enable current to be injected into the PNPN structure which eliminates the need for surface interconnection networks and increases the integration density.</p> |
申请公布号 |
CA1113614(A) |
申请公布日期 |
1981.12.01 |
申请号 |
CA19770292310 |
申请日期 |
1977.12.02 |
申请人 |
THOMSON-CSF |
发明人 |
NUZILLAT, GERARD |
分类号 |
H01L21/8226;H01L27/02;H01L27/082;H03K19/082;H03K19/091;(IPC1-7):01L29/00 |
主分类号 |
H01L21/8226 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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