发明名称 INITIAL RESET CIRCUIT OF LOGICAL OPERATION CIRCUIT
摘要 PURPOSE:To make reset for power break quick, by connecting the connection point between the parallel circuit consisting of a capacitor and a resistance and a resistance to the connection point between another resistance and capacitor through a diode and by applying power to respective series circuits. CONSTITUTION:At the application time of power supply, capacitor C is charged through resistance R3 slowly because diode D is biased backward initially; and when the charge reaches a prescribed value, Schmitt circuit 1 operates to release reset. After that, diode D is biased forward, and the potential at point (a) is converged to steady state potential V determined by resistances R1, R2 and R5. At the power break time, since electric charge of capacitor C4 is larger than that of capcitor C5, diode D is biased forward, and charge of capacitor C5 is discharged through resistance R2, an Schmitt circuit 1 is turned off to reset the circuit.
申请公布号 JPS56152321(A) 申请公布日期 1981.11.25
申请号 JP19800054690 申请日期 1980.04.24
申请人 JAPAN RADIO CO LTD 发明人 OGAWA TETSUO
分类号 H03K19/003;H03K17/22 主分类号 H03K19/003
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