发明名称 DETECTING CIRCUIT FOR HIGH GAIN
摘要 PURPOSE:To prevent generation of the offset voltage, by providing a detecting transistor by which a prescribed bias voltage is applied to an emitter and a buffer transistor in the output of the amplifying circuit to amplify and detect the input signal. CONSTITUTION:Since the feedback circuit of amplifying circuit 2 feeds back 100% DC, the emitter voltage of buffer transistor TRQ1 becomes equal to DC bias voltage V1. The emitter voltage of TRQ4 is higher than bias voltage V1 by voltage drop components due to constant current I0 and resistance R9 because voltages between bases and emitters of TRs Q9 and Q10 are equal to each other. Consequently, detecting transistor Q4 is biased at the class ''C'' operation point, and no bias current for no signal is flowed.
申请公布号 JPS56152303(A) 申请公布日期 1981.11.25
申请号 JP19800055397 申请日期 1980.04.28
申请人 HITACHI LTD;HITACHI OME ELECTRONIC CO 发明人 TSUCHIYA MITSUNORI;SATOU TETSUO
分类号 G11B27/22;H03D1/18 主分类号 G11B27/22
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