发明名称 VERTICAL DEFLECTION OUTPUT CIRCUITRY FOR TELEVISION RECEIVER
摘要 A vertical deflection output circuit including a single ended push-pull circuit comprises two output transistors, a first series circuit including a deflection coil and a capacitor, a first power source, and an excitation circuit for alternatively making the two transistors conductive in a scan period. The collector-emitter circuit of the two transistors is connected in series with the same direction of current flow thereby to form a second series circuit, the output of the excitation circuit is coupled to the respective bases of the two transistors.
申请公布号 KR810001900(B1) 申请公布日期 1981.11.20
申请号 KR19740002600 申请日期 1974.05.30
申请人 HITACHI WORKS CO LTD 发明人 ARAKAWA Y;IWABUCHI S;ANDOU K;NAKASHIMA A
分类号 H04N3/16;(IPC1-7):H04N3/16 主分类号 H04N3/16
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