| 摘要 |
PURPOSE:To prevent error, by counting with a prescribed pulse until the charging voltage to the capacitor by constant current reaches the input voltage from the specified voltage and synchronizing the charging start timing of the capacitor with this pulse. CONSTITUTION:When the A/D conversion starting signal S is inputted, the flip-flop 5 is set after the clock pulse CK is risen to turn off the transistor Q. Thus, since charging to the capacitor C is started in synchronizing with the leading of the clock pulse CK, even if the phase of the clock pulse to the A/D conversion starting signal S is different, the same counting output is obtained. |
