发明名称 PULSE WIDTH MEASURING CIRCUIT
摘要 PURPOSE:To improve the accuracy of pulse width measuring information by correcting pulse width counting values according to the phase state of the rise and fall of clock pulses for counting pulse widths and the pulse signals. CONSTITUTION:Pulse signals A-D are applied to a D type FF5 which is latched by clock pulses CK, by which the window signal P corresponding to the pulse width is formed and opening of an AND gate 6 is controlled. The pulse widths are then counted by counting of the clocks CK by the lowermost bit part 2 of an up-down counter 1 and counting of the clocks CK through the gate 6 by the upper bit part 3, which are coupled with a switch 4. On the other hand, the phase differences between the clocks CK and the rise and fall of the signals A-D are detected by a detecting circuit 7 constituted of a D type FF, a decoder, etc., and the counter 1 counts 1 bit up through a circuit 7 of which the clocks lower to a low level at their rising and rise to a high level at their falling, whereby the count value of the counter is corrected and the highly accurate measurement of the pulse widths based on true number is accomplished.
申请公布号 JPS56143961(A) 申请公布日期 1981.11.10
申请号 JP19800048483 申请日期 1980.04.11
申请人 SONY CORP 发明人 NAKANO KENJI;NAKAMURA TADAHIKO;SAKAI MASAAKI;MAGAI MITSUTOSHI
分类号 G01R29/02;G01R29/027 主分类号 G01R29/02
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