| 摘要 |
<p>PURPOSE:To obtain a prescribed output against a trouble by a method wherein numbers of cells constituting a logic region are comprised of only cells whose conductive parts in which a logical potential changes are not superposed on each other. CONSTITUTION:If a short-circuit trouble between the conductive parts each other in which the logical potential as a signal changes can be prevented, the predetermined output is fed to enable a fail safety to be secured against the interal trouble of MISLSI also. For the cells arranged on the periphery, the logical construction is brief, the behavior at the occurrence of a trouble being simple and the trouble can easily be found out, but for the cells in the logical region, the actuations and influences can not be forcasted. Thereupon, the conductive parts of which logical potentials change are expelled to be superposed on each other. For example, in EOR cell, the superposition of a gate wiring of transistors T1-T5 and T4 is eliminated by shifting the T5 to the T1 side connected with a T4-output Q, and the superposition of the gate wiring of transistors T6-T2 and of an input I2 is eliminated by arranging T6 and T7 in the opposite manner and shifting a wiring between T7- T3 on the T6. With such a consideration, the prescribed output can be fed surely even when the internal troubles of the LSI take place.</p> |
