摘要 |
<p>The proposed binary code transmission system reduces the effects of interference. The data bus is held at a set voltage level, giving a logic 'null' at all the connected receivers. Conversely, low bus voltage gives a logic 'high'. The bus (BL1) is terminated by resistors (RZ1) at each end. The resistors have a value such that when a current flow from one transmitter (SE1) the bus voltage is reduced to a value half way between the zero and normal values. The transmitters (SE1,....,SEn) have an impedance of one quarter of the dynamic impedance. Each receiver (EM1,....,EMn) has a level detector (KP1) set at a value typically three quarters of the difference between the normal bus voltage and the zero voltage condition. When a transmitter (SE1) switches from low to high its transistor (TS1) connects the bus (BL1) to a low voltage (U2). The resultant current flow reduces the bus voltage to a level which the receiver detector (EM1,KP) recognises as a logic high.</p> |