发明名称 COUNTER WITH DIGITAL HYSTERESIS CHARACTERISTIC
摘要 PURPOSE:To prevent a control output from fluctuating frequent by inhibiting a prescribed digit of a number, which is to shift in prescribed digit, from shifting at higher and lower positions even if a numeral at a lower digit than the said digit varies within an optional width. CONSTITUTION:Pulse generator 1 supplies a pulse signal to up-down counters 2- 4 and 4-bit D latch 5 and a count increase/decrease assigning signal to counters 2- 4. Then, 4-bit D latch 5 outputs a signal one pulse before the output of counter 3 for the 2nd digit; when a signal supplied from detectors 6-8 to adder 10 increases from nine to zero at the 2nd digit, subtracter 11 performs subtraction by one and when the said signal decreases from zero to nine or increases from one to two, the said subtraction is stopped to give hysteresis characteristics to variation in 3rd-digit digital value.
申请公布号 JPS56137735(A) 申请公布日期 1981.10.27
申请号 JP19800040147 申请日期 1980.03.31
申请人 ANRITSU ELECTRIC CO LTD 发明人 ISHIRO YOSHIMITSU
分类号 H03K23/00;H03K21/18 主分类号 H03K23/00
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