发明名称 A=D converter with sample-and-hold circuits - serving groups of identical stages each containing comparator and subtractor
摘要 <p>The A/D converter has a chain of identical stages. Each stage contains an amplifier with a voltage gain of two, a comparator and a subtractor. The chain is divided into several parts. Each part is preceded by a sample and hold circuit. The control inputs of sample and hold circuits belonging the consecutive parts are connected alternately to one or the other of two clock lines whose clock signals do not overlap. Each stage is served by a shift register whose input is coupled to the output of that stage's comparator. Each register receives a specified shift pulse. The outputs of all shift registers are combined in parallel to give the digital output word.</p>
申请公布号 DE3015195(A1) 申请公布日期 1981.10.22
申请号 DE19803015195 申请日期 1980.04.19
申请人 PHILIPS PATENTVERWALTUNG GMBH 发明人 MEYER-EBRECHT,DIETRICH,DR.-ING.
分类号 H03M1/00 主分类号 H03M1/00
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