发明名称 Interconnection arrangements for testing microelectronic circuit chips on a wafer
摘要 A wafer having microelectronic circuit chips thereon having electrical connections between the chips arranged so that effectively the chips are on a surface which at least in one direction is unbounded. The electrical connections may be arranged so that the chips are effectively on the surface of a cylinder, or they may be effectively on a helix. The electrical connections may optionally be arranged so that the chips are effectively on a toroid, or on an endless helix. The output connections from a chip adjacent one edge of the wafer may be connected through electrical conductors direct to the input connections of a chip adjacent the opposite edge of the wafer.
申请公布号 US4295182(A) 申请公布日期 1981.10.13
申请号 US19800120035 申请日期 1980.02.11
申请人 THE SECRETARY OF STATE FOR INDUSTRY IN HER BRITANNIC MAJESTY'S GOVERNMENT OF THE UNITED KINGDOM OF GREAT BRITAIN AND NORTHERN IRELAND 发明人 AUBUSSON, RUSSELL C.;GLEDHILL, RICHARD J.
分类号 H01L21/822;G01R31/28;G11C29/00;H01L21/66;H01L21/82;H01L23/14;H01L23/538;H01L27/04;H01L27/118;(IPC1-7):H01L27/00 主分类号 H01L21/822
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