| 摘要 |
<p>PURPOSE:To remarkably reduce the processing burden of the control computer, by detecting the status change in the plant from the input and output module, transferring the detected signal to the memory via the direct memory access controller and storing it at a bundle in the CPU side memory. CONSTITUTION:A terminal controller 301 controls periodically a plurality of input/ output modules 401, 402... with a microprocessor 30 to collect and distribute the data. Further, when the status change in the plant is detected from the input and output modules, this detection signal is fed to the direct memory access DMA controller 34 as the trip request and transferred to the memory 31 with the incrementor in the device 34. Thus, the trip sequence data fetched in the memory 31 is transferred and stored in the memory 11 at CPU at a bundle.</p> |
