| 摘要 |
PURPOSE:To enable a voltage to be made low, to reduce a power source terminals number of MOS chip and to easily write and cancel by enabling a carrier to be injected to a floating gate at a drain voltage of less than an avalanche voltage. CONSTITUTION:A sources and a drain D are formed on a silicon semiconductor substrate SUB, and the floating gate FG is formed on the substrate SUB between the source S and the drain D through a silicon oxidized film OX1. A control gate CG of Al or the like is formed on the top of the gate FG through the silicon oxidized film OX2. The substrate SUB is earthed, a positive voltage V0 reverse-biasing a junction between the drain D and the substrate SUB is applied to the drain D of a memory cell to make the avalanche fall occur between the drain D and the substrate SUB at writing. On the other hand, at cancelling, the avalanche is fallen, a negative voltage VG being applied to the gate CG, enabling the voltage to be made low and the writing and cancelling to easily be made. |
