| 摘要 |
1,253,820. Insulated gate field effect transistors. GENERAL ELECTRIC CO. 13 Dec., 1968 [18 Dec., 1967], No. 59514/68. Heading H1K. An IGFET is formed, normally in multiple, by forming an undoped layer of insulation over one face of an N(P) type semi-conductor body, depositing acceptor (donor) doped insulation over the entire layer and selectively etching to remove it over the gate sites, heating to diffuse the dopant through the undoped insulation to form source and drain regions and then providing source, drain and gate electrodes. Typically the undoped layer is silixon oxide formed by thermal oxidation of a 100 face of an N-type silicone wafer. A layer of boron doped silica is then formed by pyrolysis of a mixture of ethyl orthosilicate and triethyl borate carried in a stream of argon. This layer is removed at the gate sites by photoresist and etching steps and then diffusion is effected at 1000-1200‹ C. to form P-type source and drain regions 2-5 Á deep. Apertures extending thereto through the insulation are formed by photoresist and etching steps. Then aluminium is vapour deposited overall and shaped to form source, drain and gate electrodes by photoresist masking followed by etching in a mixture of orthophosphoric, acetic, and nitric acids. Wires are thermocompression bonded to pad extensions of the electrodes and the wafer ohmically soldered to a copper header. As an alternative the wafer is P-type in which case triethyl phosphate is used to dope the second oxide layer. In either case an undoped layer may be deposited before the doped layer to facilitate localised removal of the latter withoutaffecting the thermally grown layer. In an alternative process to avoid contamination of the thermal oxide during diffusion silicon nitride is deposited over the entire assembly before the diffusion step by glow discharge sputtering, vacuum evaporation, or pyrolysis of a silaneammonia mixture. In this case a deposited molybdenum or pyrolytic silicon masking layer is used in the etching to expose the source and drain regions and subsequently removed if necessary. Silicon oxynitride is an alternative material for the doped insulation layer and the method is stated to be applicable to the manufacture of germanium and gallium arsenide devices. Linear and annular device configurations are suggested. |
| 申请人 |
GENERAL ELECTRIC CO., SCHENECTADY, N.Y., US |
发明人 |
BROWN, DALE MARIUS, SCHENECTADY, N.Y., US |
