A memory device, more particularly word line drive circuitry for a memory device.

摘要

Word lines Wo to Wn of the memory device are connected to work line drivers WDO to WDn to which are supplied selection signals Vxo to Vxn. When a section signal Vxo is high the word line Wo is selected. and when the selection signal Vxn is low the word line Wn is non-selected. The level of Vxo (for selected word line Wo) is different for write and read operations. In a write operation Vxo is higher than in a read operation.
<??>This is provided by word line selection level switching circuit comprising transistors T1, T2 and current source Ixw, and diodes Do to Dn. In a read operation a signal WE is high, and a current Ixw flows through a load Rx connected to a selected word driver WDo, thereby reducing selection voltage Vxo. In a write operation WE is relatively low so that current Ixw does not flow through load Rx, so that Vxo has a high level (Vcc). The level of non-selected word lines is maintained independent of write and read operations.