发明名称 DELAY DETECTOR
摘要 PURPOSE:To enable adaptive control of a delay time to the center frequency variance of a reception signal, by making variable the delay time of a delay element. CONSTITUTION:The modulation wave input signal 8 is divided into 3, which are respectively input to a shift register 1, multipliers 2 and 3. The modulation signals 9 and 10 delayed for a given time with the shift register 1 are respectively fed to another input terminal of multipliers 2 and 3. The output 11 of the multiplier 2 is input to a low pass filter 4 to obtain the delayed detection output 13. The phase error detection circuit between the signals 8 and 10 consists of a part of shift register 1 and circuits 3 and 5, and the output 12 of the multiplier 3 is an output 14 rejecting the AC component with the low pass filter 5, and the control voltage output 15 with a suitale level can be obtained at the delay time control circuit 6 from the output 14. This output 15 controls the voltage controlled oscillator 7 so that normal delay detection output can be obtained even if the frequency variance of modulation wave input 8 is present, the clock rate of the transfer clock output 16 is changed and the shift register is driven with the output 16, allowing to suitably control the delay time.
申请公布号 JPS56125144(A) 申请公布日期 1981.10.01
申请号 JP19800027332 申请日期 1980.03.06
申请人 NIPPON TELEGRAPH & TELEPHONE 发明人 OGOSE SHIGEAKI;MUROTA KAZUAKI;HIRAIDE KENKICHI
分类号 H04L27/227;H03D3/06;H04L27/14;H04L27/18;H04L27/233 主分类号 H04L27/227
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