发明名称 DMA CONTROL SYSTEM
摘要 PURPOSE:To eliminate the need for a data register and to shorten the processing time, by enabling data transfer by assigning the transfer unit of data in a control register. CONSTITUTION:Data transfer between main memory device 1 and channel device 4 for files has the four-byte unit and 256-type unit. For example, when data are written in device 1 in 256-byte unit mode, subordinate processor 5 sets signal 1 in write start bit field (w) and transfer unit assignment field (b) in control register R1 and starts direct memory acess control. Consequently, data (d) in file device 6 are fetched by 256 bits at every time and written in device 1. When data are read out of device 1, signal 1 is set in field (r) in register R1 and when the transfer unit is four bytes, signal 1 is only set in transfer unit assignment field (a). Consequently, the data register is unnecessary and the processing steps of device 5 are reduced, so that the processing time will be shortened.
申请公布号 JPS56121131(A) 申请公布日期 1981.09.22
申请号 JP19800024595 申请日期 1980.02.28
申请人 FUJITSU LTD 发明人 IMAI TADAAKI;KOBAYASHI MASAAKI;NODA KANZOU
分类号 G06F13/28 主分类号 G06F13/28
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