| 摘要 |
PURPOSE:To make a mutual position relation between the data and the clock constant and thus ensure a steady operation of a multiplexing circuit, by providing a multiplying circuit and divider circuit and then feeding-back the output of the divider circuit to a phase comparator to control a voltage control type quartz oscillator. CONSTITUTION:The output of the m/n divider circuit 13 is fed back to the phase comparator PD, and the voltage control type quartz oscillator VCXO is controlled by the output of the comparator PD. At the same time, a waveform reproduction is given to the n-series signal by the output of the m/n multiplier circuit 11. Thus the phase relation is secured always constant based on the operation of a PLL among the 2-series signals CH1' and CH2' serving as the input of a parallel-serial conversion circuit and the 2-divided clock signal f0'CL, the 1-series signal CH' serving as the output of the parallel-serial conversion circuit and the output clock 2f0CL, even if a phase uncertain area such as a double multiplying circuit or the like exists within the loop of the PLL. |
