| 摘要 |
PURPOSE:To enable to make M-bit operation easily, by setting the data up to (N-M)-th bit (N>M) of a N-bit operation circuit to all 1 for one input and all zero to another input. CONSTITUTION:In registers Xi, Yi of an X register group 4 and a Y register group 5, the data of the N- and M-th bit are suitably stored, and the M-bit data are stored at the upper rank bit location other than the lower rank (N-M)-bit of each register. At the M-bit operation, control signals C4, C5 are given to set circuits 6 and 7, and the data of registers Xi, Yi are selected with the gate control signals C2, C3 of the gates 2 and 3, the X input is set to all 1 and the Y input is to all zero up to the lower rank (N-M)-bit, and they are respectively input to an N-bit operation circuit 1. The circuit 1 performs N-bit operation without noticing M-bit with the control input C1 including the carry input CA to output the signal Z as the result. Since the M-bit operation can be discriminated with CPU, the data up to (N-M)-bit is ignored. |
