发明名称 SIGNAL LOOP BACK TEST SYSTEM
摘要 PURPOSE:To enable a loop back test by inserting a sent-back signal only when detecting a test channel assignment signal and test signal from a testing station while performing two-way communication by multiplexing signals of a plurality of channels. CONSTITUTION:Two-way communication multiplexed with fall signal 12 and rise signal 22 is performed, and counter 13 counts trailing signal clock 10 to indicate a channel and then resets with frame pulse 11. As test channel assignment signal 30 is transmitted from a testing station, the counter when counting by a prescribed number starting with the frame pulse indicates the test channel. The coincidence between this signal and the signal from counter 13 is found by coincidence detecting circuit 14 and when the coincidence is detected, its output is sent to shift register 15. Next, down signal 12 is inputted to register 15 to detect a test signal, which is inputted to register 16 via a descrambler to detect an all-''1'' test signal by circuit 17. At a transmitted signal side, the test channel is detected and when the coincidence is found, the test signal is inserted into the rise signal.
申请公布号 JPS5691549(A) 申请公布日期 1981.07.24
申请号 JP19790170007 申请日期 1979.12.26
申请人 FUJITSU LTD 发明人 MURANO KAZUO;SOEJIMA TETSUO;WATANABE TOSHIAKI
分类号 H04J3/14;(IPC1-7):04J3/14 主分类号 H04J3/14
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