发明名称 PHASEESYNCHRONIZING CIRCUIT
摘要 PURPOSE:To perform synchronization without causing unbalance in drawing between two different frequencies by inputting an input signal to a circuit with two kinds of delay time. CONSTITUTION:Through time regulator 7, an input signal is supplied to a circuit with two kinds of delay time and while TdA>TdB, signals B1 and B2 are delayed by TdA and TdB respectively. When the pulse width of the input signal is T3 and that of output B3 of reference pulse generator 1 is TMS, the operation is so carried out that the falling point of signal B3 will agree with the rising point of signals B5. Here, signal B2 is matched by adjusting TdB to the rising point of the pulse preceding the agreeing pulse by one, so that the rising point of signal B2 will agree with the center position of the pulse width of signal B6. Namely, the signal B2 is matched with the half-bit succeeding position.
申请公布号 JPS5684035(A) 申请公布日期 1981.07.09
申请号 JP19790161855 申请日期 1979.12.13
申请人 FUJITSU LTD 发明人 HAMURA YOSHIHIRO
分类号 G11B20/14;H03L7/08;H04L7/033 主分类号 G11B20/14
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