发明名称 ENCODING SYSTEM
摘要 PURPOSE:To perform the superposition of frame without missing information in an arbitrary information bit, by avoiding the disagreement of the frame information and missing of information bit in the restoration to the original code, through the provision of the respective code F to codes 1, 0. CONSTITUTION:NRZ signal 1 and clock signal 2 are input to the CMI coding circuit 4 of data signal, and they are converted into the code 1 when an NRZ logic signal 1 is input and converted into the code 0 when NRZ logic signal 0 is input, to output the CMI code 6. Further, the signal 1, clock signal 2 and NRZ frame signal 3 are fed to the CMI encoding circuit 5 of the frame signal, and when the signal 3 is input, the CMI code 7 and frame insertion control signal 8 having superimposed frame to the codes 1 and 0 are output. Further, the signal is selected with the control signal 8 through the selector 9 to output the frame overlap CMI code 10 without missing of the information bit.
申请公布号 JPS5683163(A) 申请公布日期 1981.07.07
申请号 JP19790159904 申请日期 1979.12.10
申请人 NIPPON ELECTRIC CO 发明人 KIYOTA KAZUNARI
分类号 H03M5/12;H04J99/00;H04L25/49 主分类号 H03M5/12
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