发明名称 FAULT DETECTION SYSTEM OF COMPOUND TYPE ARITHMETIC DEVICE
摘要 <p>PURPOSE:To make it possible to detect a fault of each arithmetic device exactly and fail-safely, by constituting the device so that the time for resetting a data request signal from its generation can be made shorter than the operation time of the fault detection means. CONSTITUTION:In case when a data is not transferred from the device 31 due to a fault of the arithmetic device 31, although the arithmetic device 32 has output a data request signal A2, the signal A2 is not reset all the time. Accordingly, the transistor TR36 remains conducting, exceeding the prescribed time, and therefore the fault detection relay 40 operates, and it can be detected that something abnormal has occurred. Also, in case when a coil of the relay 40 has been disconnected, outputs of the photocouplers 38, 39 die away, and the status becomes same as the data request signal A1 or A2 is being output, therefore the devices 31, 32 are able to detect it as an abnormal input. When the relay 40 cannot be driven due to a fault of the output buffers 33, 34 or TRs 35, 36, the devices 31, 32 are able to detect the fault according to the fact that the signals A1, A2 which they have output themselves are not fed back.</p>
申请公布号 JPS5679345(A) 申请公布日期 1981.06.29
申请号 JP19790154166 申请日期 1979.11.30
申请人 HITACHI LTD 发明人 TOYODA EIICHI;YAMAMURA MASAYORI
分类号 B60L3/08;G06F11/16;G06F17/10 主分类号 B60L3/08
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