发明名称 DIAL PULSE RECEIVER
摘要 PURPOSE:To reduce the amount of software, by counting dial pulses, detection of abondoned said pulses on its half-way and discrimination an inter-digit by means of logic circuit and memory. CONSTITUTION:A dial pulse count logic circuit 2 references an ACT memory 3 which indicates the effectiveness of receiver during the reception of numerals, LL memory 4 storing the result of scanning before one period of signal bit, dial counter memory 9, and AP memory 12 storing the detection of pulse to detect the part between digits of the dial pulse signals, and performs the detection and count of the dial pulses. A discrimination circuit for abondonment on its way DET15 references an APLL memory 16 storing the result of the AP memory 12 before one period, memory 16 and memory 19 displaying the detection of one numeral, memory 21 storing the numeral, and memory 23 storing the information of the discrimination of abondonment on half way, to discriminate the part inter-digit and the abondonment of half way.
申请公布号 JPS5675790(A) 申请公布日期 1981.06.23
申请号 JP19790153524 申请日期 1979.11.26
申请人 NIPPON TELEGRAPH & TELEPHONE;OKI ELECTRIC IND CO LTD;NIPPON ELECTRIC CO;HITACHI LTD;FUJITSU LTD 发明人 IMAGAWA HITOSHI;HASHIZUME YUKINAO;HASEGAWA KOUICHI;OBARA SUSUMU;SHIMOE TOSHIO
分类号 H04Q3/545;H04Q1/32 主分类号 H04Q3/545
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