Integrated MOS circuit prodn. by silicon gate technology - with self-aligning overlapping source-drain contact using silicon nitride masking

摘要

Prodn. of integrated MOS circuits is carried out by Si-gate technology, with self-aligning, overlapping source/drain contacts, using Si3N4 masking. Before prodn. of the source/drain zones by ion implantation, the gate oxide is removed in the region of the free substrate surface and oxidn. is carried out below 100 deg.C in a humid atmos., so that oxide films of different thickness form on the doped poly-Si regions and the weakly doped substrate. A Si3N4 film is applied for insulation between the poly-Si regions and the contact metal film. A great packing density is possible, since safety spacings are superfluous short circuits between the metallisation and adjacent doped regions in the Si substrate are avoided and over-large contact window for the source/drain contact can be opened over the gate oxide and the thick oxide zones.