发明名称 SUBSIDIARY SYNCHRONOUS CLOCK GENERATOR
摘要 PURPOSE:To ensure a simple inspection for the accuracy of the oscillation frequency in case the fundamental frequency component cannot be obtained, by installing the transmitting device synchronized with the reference frequency component pluse the frequency comparing device of a simple structure. CONSTITUTION:When a connection is secured between the terminals 1 and 2 via the switch SW1, the signal of reference frequency f0 is supplied to the oscillating device OSC1. Thus the device OSC1 is put under the slave state in synchronization with the frequency f0 and has an oscillation with the frequency f1. When the switch SW2 is turned off, the oscillating device OSC2 to which no frequency f0 is supplied is put under the free-run state and then has an oscillation with the frequency f2. The comparing device CMP compares the signal of f1 with the signal of f2. When the inspection of the unit OSC2 is over, the switch SW2 is turned on to give a slave working to the device OSC2. Then one of these two oscillating devices is set at the ACT side with the other set at the STAND-BY side each, thus obtaining the working of a double system.
申请公布号 JPS5664595(A) 申请公布日期 1981.06.01
申请号 JP19790140565 申请日期 1979.10.31
申请人 NIPPON ELECTRIC CO 发明人 MURATA HATSUO;YOSHIDA YOSHINORI
分类号 H04J3/06;H04B1/74;H04M3/22;H04Q11/04 主分类号 H04J3/06
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