发明名称 RAM with bit addressing - has eight memory stages for bit storage individually accessed by decoded three bit address
摘要 <p>A v.a.m. for use in microprocessor applicators allows multi-bit words to ba addressed on a bit basis. The system utilises eight single memory modules, each containing a number of single bit locations addressed by ten bits supplied from a common bus. The outputs of the memory are coupled onto an 8 bit data bus over a coupling stage. The addresses for the memory locations are provided on one section of an address register. A separate section of the register contains a three bit address that is decoded and gated to identify the specific memory bit store to be accessed.</p>
申请公布号 DE2942741(A1) 申请公布日期 1981.05.07
申请号 DE19792942741 申请日期 1979.10.23
申请人 LICENTIA PATENT-VERWALTUNGS-GMBH 发明人 SCHWARTZ,GUENTER,DIPL.-ING.;KUNERT,ING.(GRAD.),REIMAR;POLLY,ING.(GRAD.),EDGAR;KRETSCHMER,ING.(GRAD.),GERHARD
分类号 G06F12/04;G11C8/12;(IPC1-7):11C7/00 主分类号 G06F12/04
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