| 摘要 |
<p>PURPOSE:To make it unnecessary to provide a timer for each controlled memory board, by storing individual access times of controlled memory boards in the ROM of the control board and by generating WAIT signals for them by the control board, in the small-scale computer equipped with a CPU. CONSTITUTION:The CPU transmits the address signal indicating memory board HCB-n to the system bus. The ROM in control board CB transmits storage data, which corresponds to the data read time in the designated memory board to be controlled, to down counter DCT. DCT not only sets access time information but also transmits the WAIT signal to the CPU. When the count value of DCT becomes 0 by clocks of clock generator CG and the WAIT signal terminals, the CPU starts data read from memory board to be controlled HCB-n.</p> |
