| 摘要 |
PURPOSE:To eliminate the indeterminacy of a leading-in phase without requiring differential logic conversion by regenerating the 2nd digital signal by phase-demodulating a modulated wave, obtained by performing the multiphase, multilevel modulation with at least four lines of the 1st digital signals, by deciding the leading-in phase and then by equalizing the 1st and 2nd digital signals mutually. CONSTITUTION:Four lines of base band signals S11-S22 including frame pulses using a PN pattern consisting of seven bits are supplied to modulator 1, which performs multilevel, multiphase modulation to obtain a modulated signal. This modulated signal is supplied to demodulator 2 for phase demodulation and multilevel discrimination to obtain demodulated signals S11'-S22' and a branched demodulated signal is supplied to synchronizing circuit 3 to attain frame synchronization. Then, deciding circuit 19 decides the leading-in phase by other three signals and frame timing pulse F of synchronizing circuit 3. Gate circuit 20 is controlled with the decision signal to obtain original signals S11-S22. |
