| 摘要 |
1,164,094. Multiplex pulse code signalling. PHILIPS ELECTRONIC & ASSOCIATED INDUSTRIES Ltd. 15 March, 1968 [18 March, 1967], No. 12702/68. Heading H4L. In a receiver for a time division multiplex communication system each received frame of signals is divided into two groups of channels which are stored alternately in two shift registers, one group being read out of one register while the other group is being stored by the other register. As described, there are ten channels numbered 0 to 9 per frame, channel 0 carrying a frame sync. pulse, and transmission is by delta modulation. The received pulses are supplied via an amplifying device 11, Fig. 3, which includes frequencychanging, detection &c., and the sync. signal is selected at 12 and supplied to a switching signal generator 25 which supplies a high level signal for one half and a low level signal for the remaining half of a frame. The sync. signals from 12 also control a bit-frequency generator 26 supplying shift pulses via gate 27 or 28, operated alternately by the signal from 25, to a corresponding shift register R1 or R2. The signal pulses from 11 are supplied to a gate 23 or 24, also operated alternately by the switching signal from 25, so that channels 0 to 4 are supplied to the register R1 and channels 5 to 9 to the register R2. By this means, channels 1 to 4 are supplied via gates 22 to the demodulating circuits A1 to A4 and channels 5 to 9 are supplied to demodulating circuits A5 to A9, the two groups of circuits being brought into operation alternately by pulses supplied by a circuit 29 and derived via a pulse regenerator 13 from the incoming sync. pulses. |
