Digital AGC circuit for radar target detector - has gain controlled from memorised signal from counter and digital integrator circuits

摘要

The detection is achieved by automatic control of video frequency receiver gain using a memory system. The memory contents are derived from integration of successive recurrences of the radar signals. A gain control circuit comprises a threshold circuit (2) which receives video frequency signals from a variable gain amplifier (1). If the received signals exceed a threshold value then clock signals are applied to a counter (3) and the number of pulses in a time period is applied to a subtraction circuit (4). This produces an output (No) which determines the mean noise value. The resultant output is applied to an integrator (5) containing read and write memories. This allows the new values of pulses from the counter to be stored for application to the variable gain amplifier via a D/A converter (62) to change the gain.