发明名称 SYSTEM FOR PROTECTING INPUT AND OUTPUT OF SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To protect the circuit from the excessive input voltage without fail, without regard to the interior connecting state of the input and output terminals, by providing the current outgoing path of a protecting circuit against the excessive voltage at the input terminal on a power supply line, which is different from a grounding line. CONSTITUTION:A semiconductor integrated circuit is constituted by a power supply line 22, a grounding line 23, an MOSFET 27 which receives an input signal from a terminal 25, another MOSFET 29, and the like. An electrostatic protecting circuit PT which protects the circuit from the excessive input voltage is constituted by an MOSFET 28 and a resistor 26, and a current outgoing path is formed by connecting the input terminal 25 and the power supply line 22. If there is an excessive input, the portion between the source S and the drain D of the MOSFET 28 is conducted. Since there is a large capacity C2 between the power supply line 22 and a semiconductor substrate 20, the excessive increase in the potential of the gate G of the MOSFET 27 can be prevented.
申请公布号 JPS5638853(A) 申请公布日期 1981.04.14
申请号 JP19790114962 申请日期 1979.09.07
申请人 TOKYO SHIBAURA ELECTRIC CO 发明人 SAKAGAMI KENROU
分类号 H01L29/78;H01L27/02;H01L27/06;H03K17/08;H03K19/0944 主分类号 H01L29/78
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