发明名称 Selective epitaxy method for making filamentary pedestal transistor
摘要 A method for making a bipolar filamentary pedestal transistor having reduced base-collector capacitance attributable to the elimination of the extrinsic base-collector junction. Silicon is deposited upon a coplanar oxide-silicon surface in which only the top silicon surface of the buried collector pedestal is exposed through the oxide. Epitaxial silicon deposits only over the exposed pedestal surface while polycrystalline silicon deposits over the oxide surface. The polycrystalline silicon is etched away except in the base region. An emitter is formed in the base region and contacts are made to the emitter, base and collector regions.
申请公布号 US4252581(A) 申请公布日期 1981.02.24
申请号 US19790080648 申请日期 1979.10.01
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 ANANTHA, NARASIPUR G.;CAVALIERE, JOSEPH R.;KONIAN, RICHARD R.;SRINIVASAN, GURUMAKONDA R.;STOLLER, HERBERT I.;WALSH, JAMES L.
分类号 H01L21/033;H01L29/08;H01L29/10;(IPC1-7):H01L21/20;H01L21/30 主分类号 H01L21/033
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