| 摘要 |
PURPOSE:To limit the substrate voltage variation within a small value in a semiconductor 1C which is integrated accompanied by a substrate voltage generating circuit without addition of externally added capacitor by a capacitor being integrated within a package. CONSTITUTION:Beneath a die pad region C in a package where packaging materials are piled up, a connecting plate E which is connected with an electrode A0 which is connected with a power source is installed within it. A semiconductor device which is integrated accompanied by a substrate voltage generating circuit has a die pad region covered with a conductor all over it, and on them a semiconductor chip is placed. And for energizing the substrate by a voltage generated on the semiconductor device's surface there is a connection by a wiring material D between die pad regions. In this constitution a capacitor can be formed between the die pad region and the electrode plate E having insulation materials between them. By this consitution a voltage terminal on the semiconductor device's surface have a large capacitance for generating voltages, and a substrate voltage is able to have a small variation. |
