发明名称 ISOLATING SYSTEM FOR MULTIPLE SIGNAL
摘要 PURPOSE:To perform the isolation of the PCM multiple signal with a simple constitution and receiving no effect of the jitter, by producing the clock having the tooth lacking part as well as the fixed relation to the common transmission clock. CONSTITUTION:Memory MEM is given to the n-multiple PCM signal sent from higher-order group device by clock fin sent from the common timing device, and then the fixed process is given to obtain isolation data 1-n. In this case, fin is supplied to PLL and output buffers DFF1 and so on, and frame pulse FP in the multiple signal synchronized with fin is supplied to frequency divider DIV. And the outputs of DIV having different division ratios are supplied to decoder DEC and logic arithmetic circuit AD each. Then inhibit pulse IHP having the time duration larger than the expected jitter amount of fin is applied to AD to obtain pulse train f2' having the tooth lacking part. And then the contents of MEM are taken into shift register SR, and also the outputs of SR are supplied to DFF1- in sequence.
申请公布号 JPS561638(A) 申请公布日期 1981.01.09
申请号 JP19790077018 申请日期 1979.06.19
申请人 FUJITSU LTD 发明人 OKINO TAKAYUKI;TSUDA HARUO;SUDOU MAKOTO
分类号 H04J3/04;H04J3/06 主分类号 H04J3/04
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