| 摘要 |
PURPOSE:To evade destruction caused by a through-current flowing depending on the difference from logical values when CMOS output circuits are connected in error by controlling the CMOS output circuits to be in a high impedance state. CONSTITUTION:A current flows through an output terminal 113 to a VDD or GND and a potential difference and a potential difference is generated across a resistor R. A comparator circuit 101 detects it that the potential difference is larger than a preset potential difference V1. Then if a comparison output signal C is outputted consecutively during a period of an output time difference between carry signals D and F of counter circuits 104 and 105 counting an output signal of a ring oscillation circuit 103, an AND gate circuit 108 generates an error detection signal F discriminating the flowing of a through-current to the CMOS output circuit. Then a D FF circuit 110 is set and an output control signal G of the D FF circuit 110 is used to control CMOS output TRs Q1, Q2 to bring the state into a high impedance state. |
