发明名称 ARRAY PROCESSOR CONTROLLER
摘要 PURPOSE:To enhance the throughput by producing the overflow alarm signal prior to the stack overflow detection of the output buffer memory with every processor in case the processing time differs for each processor forming the array. CONSTITUTION:Plural units of processor 1 which secure the operation of the array processor for the whole unit are connected to corresponding stack overflow alarm signal generating circuit 2 via signal lines 17-19. And each processor 1 is connected in parallel to input data transfer destination processor selection circuit 4 via information lines 11 and 12 or to array processor lock signal generating circuit 3 connected to circuit 4 and via signal line 15. Then circuit 2 is also connected to circuit 3 via signal lines 26 and 28. Thus the processor controller is formed. In such way, the unprocessed input data within the processor and due to the stack overflow can be done even in case the processing time differs for each processor 1. Thus the software process can be facilitated when the processing is started again.
申请公布号 JPS55150062(A) 申请公布日期 1980.11.21
申请号 JP19790057245 申请日期 1979.05.10
申请人 NIPPON ELECTRIC CO 发明人 OOWADA KATSUAKI
分类号 G06F9/38;G06F11/00;G06F15/16;G06F15/177;G06F15/80;G06F17/16;G06T1/20 主分类号 G06F9/38
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