| 摘要 |
PURPOSE:To remarkably simplify the constitution of N notation counter, by providing the logic gate which receives the output of (n-1) stages among n stages of flip flops and gives logic output to the remaining one stage. CONSTITUTION:When the outputs A, B, C of D shape flip flops FFa, FFb, FFc are 0, 0, 0 respectively, the output of the NOR circuit Gc is 1 and the output is 0, 0, 1 with the clock CLK entered. Next, when the clock enters, since the input of the NOR circuit Gc is still 0, 0, the output is 1 and the output state is 0, 1, 1. Next, when further clock enters, since the input of the NOR circuit Gc is 0, 1, the output is 0 and the state of output is 1, 1, 0. With further clock entered, since the input of the NOR circuit Gc is 1, 1, the output is 0 and the state of output is 1, 0, 0. Further, when clock enters, the output of the NOR circuit Gc is 0, and the state returns to the initial condition. |
