发明名称 THREE PHASE PULSE GENERATING CIRCUIT
摘要 PURPOSE:To obtain the three phase pulse with longer life and small size, by providing three circuits one circuit of which consists J-K type FF, two AND gate AND and exclusive OR gate EOR. CONSTITUTION:To the terminal T of FF1-3 in the circuit consisting or FF1-3, EOR4-9, AND10-15 and NOR gate NOR16, the clock signal is fed from the terminal 17 and control signal of 0 is input to the therminal 18 connected to one input of EOR4-6. When this signal is 0, forward three phase signal is selected and when 1, reversing three phase signal is selected. When the output Q of FF1-3 is respectively 0, 0, 1 at forward mode, the output of EOR4-6 is also 0, 0, 1, and 1, 0 are input to EOR7 and the output is 1 due to disagreement to open the AND10, 11. In this case, when the clock is fed to the terminal 17, the output of each FF is 1, 0, 1, and it is 1, 0, 0 at the next clock to output the three phase pulse to the terminals 19-21. Since this circuit consists of electronic circuit, it has long life and the size is small.
申请公布号 JPS55147035(A) 申请公布日期 1980.11.15
申请号 JP19790056705 申请日期 1979.05.04
申请人 MITSUBISHI ELECTRIC CORP 发明人 NAKAOKA HIDEMASA
分类号 H02P6/16;G01R11/02;H02P8/14;H03K5/15 主分类号 H02P6/16
代理机构 代理人
主权项
地址
您可能感兴趣的专利